The design of most printed circuit boards, integrated circuit packages and integrated circuits (“substrates”) is accomplished today via electronic design automation (“EDA”) logic or software tools, such as, e.g., Allegro or the Advanced Package Designer (“APD”) by Cadence Designs Systems, Inc. Such tools facilitate the physical circuit layout of single or multi-layered substrates comprising multiple nets, paths, vias and traces. For example, using an EDA tool, a substrate designer locates and describes the lines and vias which comprise nets of the substrate, including the physical properties thereof such as width, shape, spacing, etc.
As substrates become smaller and the designs thereof become more complex (i.e., the amount of vias and traces becomes more dense), substrate designers are more mindful of the potentially negative effects (e.g., signal delay and distortion) of the electromagnetic interactions of the connective elements of the nets in the substrate. For example, capacitive signal coupling may occur between such elements of the substrate. If kept below a threshold level, such signal coupling will likely not have a significant effect on substrate performance. If allowed to exceed such a threshold level, however, such signal coupling may have a significantly deleterious effect on substrate performance.